For years, computer systems with more than one microprocessor would use a host bus that is shared by the processors and the supporting chipset. The processors and the chipset, for example an input/output controller hub or memory controller hub would all connect to the same bus and the bus might also include cache memory or maybe even graphics. Increasingly, computer systems are being built with point-to-point links between the processors and with the chipset instead of the shared connections. This is done not only in high power workstation computers, but also in multiprocessor server computers. With a point-to-point link, a coherent interface may connect a microprocessor directly to another microprocessor. Another separate link may connect the microprocessor to the input/output or memory controller hub. Another link may connect the microprocessor to a third microprocessor. Where there is a small number of processors, such as 2 or 3, a point-to-point link can allow the link from each processor to be directly connected to another processor's link. The link may be built into each processor and already configured to be installed into and operate within a multiple processor computer system.
If, on the other hand, there are more than a very few processors, such a point-to-point link to each component becomes cumbersome. Also, in large scale workstation and server systems, where a very high degree of reliability is desired, a special chipset and a unique, typically proprietary, interface link definition is often used. The unique chipset and link add additional costs to the computer systems. While the additional layers required for higher reliability could be added to all microprocessors and chipsets, spreading the costs over a much larger volume of components, this would add cost and complexity to the smaller scale systems. It might also slow communications over the interface in systems that have very little extra margin for speed losses.